Product Summary

The CY7C136-55JXC is a 2K x 8 Dual-Port Static RAM. Two ports are provided to permit independent access to any location in memory. The CY7C136-55JXC can be utilized as either a standalone 8-bit dual-port static RAM or as a MASTER dual-port RAM in conjunction with the CY7C136-55JXC SLAVE dual-port device in systems requiring 16-bit or greater word widths. It is the solution to applications requiring shared or buffered data such as cache memory for DSP, bit-slice, or multiprocessor designs.

Parametrics

CY7C136-55JXC absolute maximum ratings: (1)Storage Temperature: -65℃ to +150℃; (2)Ambient Temperature with; (3)Power Applied: -55℃ to +125℃; (4)Supply Voltage to Ground Potential; (5)(Pin 48 to Pin 24): -0.5V to +7.0V; (6)DC Voltage Applied to Outputs; (7)in High-Z State: -0.5V to +7.0V; (8)DC Input Voltage: -3.5V to +7.0V; (9)Output Current into Outputs (LOW): 20 mA.

Features

CY7C136-55JXC features: (1)True Dual-Ported memory cells which allow simultaneous reads of the same memory location; (2)2K x 8 organization; (3)0.65-micron CMOS for optimum speed/power; (4)High-speed access: 15 ns; (5)Low operating power: ICC = 110 mA (max.); (6)Fully asynchronous operation; (7)Automatic power-down; (8)Master CY7C132/CY7C136 easily expands data bus width to 16 or more bits using slave CY7C142/CY7C146; (9)BUSY output flag on CY7C132/CY7C136; BUSY input; (10)on CY7C142/CY7C146; (11)INT flag for port-to-port communication (52-pin; (12)PLCC/PQFP versions); (13)Available in 48-pin DIP (CY7C132/142), 52-pin PLCC and 52-pin TQFP (CY7C136/146); (14)Pb-Free packages available.

Diagrams

CY7C136-55JXC pin connection

Image Part No Mfg Description Data Sheet Download Pricing
(USD)
Quantity
CY7C136-55JXC
CY7C136-55JXC

Cypress Semiconductor

SRAM 5V 2Kx8 COM Dual-Port SRAM

Data Sheet

Negotiable 
CY7C136-55JXCT
CY7C136-55JXCT

Cypress Semiconductor

SRAM 5V 2Kx8 COM Dual-Port SRAM

Data Sheet

Negotiable